1. Field of the Invention
The present invention relates to digital electronics, and more specifically, to two's complement operations in digital circuits.
2. Description of the Prior Art
In many digital systems, data is stored and handled in floating-point form. Typically, memory registers, input devices, and output devices of such systems are configured for storing, manipulating, and handling floating-point data. However, when mathematical operations are required to be performed, such systems become encumbered by numerous two's complement conversions.
FIG. 1 illustrates a schematic diagram of a four-component dot product (DP4) operation according to the prior art. Products of a multiplication, which is performed directly on the floating-point data, enter the system at step 102. For example, when performing a dot product on two four-dimensional vectors, there would be four product terms as indicated by “X”. This prior art design uses three floating-point number adders to implement an addition of four floating-point numbers. Referring to FIG. 1, each block encircled by a dotted line represents a floating-point number adder. Each floating-point number adder takes two floating-point numbers as inputs, and outputs one sum being a floating-point number. When data is input, the data is transformed into a two's complement number if necessary in step 104. Next, in step 106, the data is bit shifted by the respective exponent to align the decimal point, before being intermediately added in step 108. The result of the addition in step 108 must then be converted to two's complement format if necessary in step 110 before being shifted again in step 112 to normalize the output of the floating-point number adder. Steps 114 to 122 are another floating-point number adder's corresponding steps, and further description is omitted for brevity. The final result of a floating-point number is produced for step 124.
As the examples above illustrate, performing two's complement operations in a floating-point system can be quite demanding and time consuming. Furthermore, when many two's complement conversions are required, one prior art technique is to provide additional hardware (such as converters) in each device performing two's complement operations.